Intel Xeon Phi coprocessor high-performance programming / Jim Jeffers, James Reinders.

By:

Jeffers, Jim (Computer engineer)

Contributor(s):

[2013]Description: 1 online resource (xx, 409 pages) : illustrationsContent type:

text

Media type:

computer

Carrier type:

online resource

ISBN:

9780124104945
0124104940

Subject(s):

Genre/Form:

Electronic books.

Additional physical formats: Print version:: Intel Xeon Phi coprocessor high-performance programmingLOC classification:

QA76.5 .J44 2013eb

Online resources:

Contents:

ch. 1 Introduction -- ch. 2. High performance closed track test drive! -- ch. 3. A friendly country road race -- ch. 4. Driving around town : optimizing a real-world code example -- ch. 5. Lots of data (vectors) -- ch. 6. Lots of tasks (not threads) -- ch. 7. Offload -- ch. 8. Coprocessor architecture -- ch. 9. Coprocessor system software -- ch. 10. Linux on the coprocessor -- ch. 11. Math library -- ch. 12. MPI -- ch. 13. Profiling and timing -- ch. 14. Summary.

Summary: Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products. This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture. A practical guide to the essentials of the Intel Xeon Phi coprocessorPresents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming modelIncludes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational productCovers wide vectors, many cores, many threads and high bandwidth cache/memory architecture.

Item type:

eBooks

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Includes bibliographical references and index.

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products. This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture. A practical guide to the essentials of the Intel Xeon Phi coprocessorPresents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming modelIncludes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational productCovers wide vectors, many cores, many threads and high bandwidth cache/memory architecture.

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