TY  - BOOK
AU  - Posseme,Nicolas
ED  - ScienceDirect eBooks.
TI  - Plasma etching processes for interconnect realization in VLSI
SN  - 9780081005903
AV  - TK7874.75 
PY  - 2015///
CY  - London, Oxford
PB  - ISTE Press, Elsevier Ltd
KW  - Integrated circuits
KW  - Very large scale integration
KW  - Plasma etching
KW  - Molded interconnect devices
KW  - TECHNOLOGY & ENGINEERING
KW  - Mechanical
KW  - bisacsh
KW  - fast
KW  - Electronic books
KW  - local
N1  - Includes bibliographical references and index; Front Cover ; Plasma Etching Processes for Interconnect Realization in VLSI; Copyright ; Contents ; List of Acronyms ; Preface ; Chapter 1: Introduction ; 1.1. Integration Processes Related to Copper Introduction ; 1.2. Dielectric Material with Low-k Value (<4) ; Chapter 2: Interaction Plasma/Dielectric; 2.1. Porous SiOCH Film Etching; 2.2. Porous SiOCH Film Sensitivity to Post-Etch Treatments ; Chapter 3: Porous SiOCH Film Integration; 3.1. Trench First Metallic Hard Mask Integration ; 3.2. Porous SiOCH Integration Using the Via First Approach ; 3.3. Summary; Chapter 4: Interconnects for Tomorrow 4.1. Consequence of Porosity Increase ; 4.2. Process Solutions for Dielectric Constant Reduction ; 4.3. Material Solutions for Dielectric Constant Reduction ; 4.4. Alternative Interconnect Architectures for Dielectric Constant Reduction ; 4.5. Conclusion ; Bibliography ; List of Authors ; Index
N2  - This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions
UR  - http://ezproxy.alfaisal.edu/login?url=https://www.sciencedirect.com/science/book/9781785480157
ER  -