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Coupled Data Communication Techniques for High-Performance and Low-Power Computing [electronic resource] / edited by Ron Ho, Robert Drost.

Contributor(s): Series: Integrated Circuits and Systems ; 0Publisher: Boston, MA : Springer US, 2010Description: XVI, 206 p. 183 illus. online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9781441965882
Subject(s): Genre/Form: Additional physical formats: Printed edition:: No titleDDC classification:
  • 621.3815 23
LOC classification:
  • TK7888.4
Online resources:
Contents:
to Coupled Data Technologies -- Overview of 3D Technologies -- Power delivery, signaling and cooling for 2D and 3D integrated systems -- Coupled Data Technologies -- Capacitive Coupled Communication -- Inductive Coupled Communications -- Use of AC Coupled Interconnect in Contactless Packaging -- Enabling Coupled Data Technologies -- Aligning chips face-to-face for dense capacitive communication -- Extending Data Coupling Technologies -- Delivering On-chip Bandwidth Off-chip and Out-of-box with Proximity and Optical Communication -- AC Coupled Wireless Power Delivery.
In: Springer eBooksSummary: Designers of next-generation high-performance computer systems face a host of technical challenges. For the past several decades, rising clock frequencies and increased chip integration have fueled the growth of computer performance. Now these trends have slowed: power and complexity constrains further increases in clock frequencies, and economic realities limit the pace of Moore's Law. Coupled data communication provides a way forward, and this book, Coupled Data Communication Techniques for High-Performance and Low-Power Computing, gives a comprehensive overview for such coupled data techniques. Coupled data communication allows chips to communicate—capacitively or inductively—over short distances between chips without solder, and fundamentally shifts the design paradigm from single-chip integration to single-package integration. This book covers the state-of-the-art in the circuits, architectures, and chip packaging for this novel chip-to-chip communication technology and showcases its potential to drive the coming decades of industry growth. Coupled Data Communication Techniques for High-Performance and Low-Power Computing should be of interest to students and designers in circuits and system architecture.
Item type: eBooks
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to Coupled Data Technologies -- Overview of 3D Technologies -- Power delivery, signaling and cooling for 2D and 3D integrated systems -- Coupled Data Technologies -- Capacitive Coupled Communication -- Inductive Coupled Communications -- Use of AC Coupled Interconnect in Contactless Packaging -- Enabling Coupled Data Technologies -- Aligning chips face-to-face for dense capacitive communication -- Extending Data Coupling Technologies -- Delivering On-chip Bandwidth Off-chip and Out-of-box with Proximity and Optical Communication -- AC Coupled Wireless Power Delivery.

Designers of next-generation high-performance computer systems face a host of technical challenges. For the past several decades, rising clock frequencies and increased chip integration have fueled the growth of computer performance. Now these trends have slowed: power and complexity constrains further increases in clock frequencies, and economic realities limit the pace of Moore's Law. Coupled data communication provides a way forward, and this book, Coupled Data Communication Techniques for High-Performance and Low-Power Computing, gives a comprehensive overview for such coupled data techniques. Coupled data communication allows chips to communicate—capacitively or inductively—over short distances between chips without solder, and fundamentally shifts the design paradigm from single-chip integration to single-package integration. This book covers the state-of-the-art in the circuits, architectures, and chip packaging for this novel chip-to-chip communication technology and showcases its potential to drive the coming decades of industry growth. Coupled Data Communication Techniques for High-Performance and Low-Power Computing should be of interest to students and designers in circuits and system architecture.

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