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	1.		Image from Amazon.com	Routing Congestion in VLSI Circuits: Estimation and Optimization [electronic resource] / by Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. by Saxena, Prashant [author.] Shelar, Rupesh S [author.] Sapatnekar, Sachin S [author.] SpringerLink (Online service) Series: Series on Integrated Circuits and SystemsPublisher: Boston, MA : Springer US, 2007 In: Springer eBooks Online resources: Click here to access online Availability: No items available. Place hold Save to lists Add to cart (remove)
	2.		Image from Amazon.com	Three Dimensional Integrated Circuit Design [electronic resource] : EDA, Design and Microarchitectures / edited by Yuan Xie, Jason Cong, Sachin Sapatnekar. by Xie, Yuan [editor.] Cong, Jason [editor.] Sapatnekar, Sachin [editor.] SpringerLink (Online service) Series: Integrated Circuits and SystemsPublisher: Boston, MA : Springer US, 2010 In: Springer eBooks Online resources: Click here to access online Availability: No items available. Place hold Save to lists Add to cart (remove)

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