Built-in test for VLSI [electronic resource] : pseudorandom techniques / Paul H. Bardell, William H. McAnney, Jacob Savir.
c1987Description: 1 online resource (1 v.) : illOther title:- Built-in test for very large scale integration
eBooks
Description based on print version record.
"A Wiley-Interscience publication."
Includes bibliographical references and index.
Digital testing and the need for testable design -- Principles of testable design -- Pseudorandom sequence generators -- Test response compression techniques -- Shift-register polynomial division -- Special-purpose shift-register circuits -- Random pattern built-in test -- Built-in test structures -- Limitations and other concerns of random pattern testing -- Test system requirements for built-in test.