000			04045nam a22005175i 4500
001			978-1-4614-0788-1
003			DE-He213
005			20160615110828.0
007			cr nn 008mamaa
008			120316s2012 xxu| s |||| 0|eng d
020			_a9781461407881 _9978-1-4614-0788-1
024	7		_a10.1007/978-1-4614-0788-1 _2doi
049			_aAlfaisal Main Library
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aShen, Ruijing. _eauthor.
245	1	0	_aStatistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs _h[electronic resource] / _cby Ruijing Shen, Sheldon X.-D. Tan, Hao Yu.
264		1	_aBoston, MA : _bSpringer US, _c2012.
300			_aXXX, 306 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aFundamentals of Statistical Analysis -- Statistical Full-Chip Leakage Power Analysis -- Statistical Full-Chip Dynamic Power Analysis -- Statistical Parasitic Extraction -- Statistical Compact Modeling and Reduction of Interconnects -- Statistical Analysis of Global Interconnects -- Statistical Analysis and Modeling for Analog and Mixed-Signal Circuits.
520			_aSince process variation and chip performance uncertainties have become more pronounced as technologies scale down into the nanometer regime, accurate and efficient modeling or characterization of variations from the device to the architecture level have  become imperative for the successful design of VLSI chips. This book provides readers with tools for variation-aware design methodologies and computer-aided design (CAD) of VLSI systems, in the presence of process variations at the nanometer scale. It presents the latest developments for modeling and analysis, with a focus on statistical interconnect modeling, statistical parasitic extractions, statistical full-chip leakage and dynamic power analysis considering spatial correlations, statistical analysis and modeling for large global interconnects and analog/mixed-signal circuits.  Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits; Helps chip designers understand the potential and limitations of their design tools, improving their design productivity; Presents analysis of each algorithm with practical applications in the context of real circuit design; Includes numerical examples for the quantitative analysis and evaluation of algorithms presented.  Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits; Helps chip designers understand the potential and limitations of their design tools, improving their design productivity; Presents analysis of each algorithm with practical applications in the context of real circuit design; Includes numerical examples for the quantitative analysis and evaluation of algorithms presented. .
650		0	_aEngineering.
650		0	_aComputer-aided engineering.
650		0	_aNanotechnology.
650		0	_aElectronic circuits.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aComputer-Aided Engineering (CAD, CAE) and Design.
650	2	4	_aNanotechnology and Microengineering.
655		7	_aElectronic books. _2local
700	1		_aTan, Sheldon X.-D. _eauthor.
700	1		_aYu, Hao. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781461407874
856	4	0	_uhttp://ezproxy.alfaisal.edu/login?url=http://dx.doi.org/10.1007/978-1-4614-0788-1
912			_aZDB-2-ENG
942			_2lcc _cEBOOKS
999			_c281991 _d281991